In the design of modern integrated circuits, particularly digital circuits, standard cells having fixed functions are widely used. Standard cells are often pre-designed and saved in cell libraries. At the time integrated circuits (applications) are designed, the standard cells are retrieved from the cell libraries and placed into desirable locations. Routing is then performed to connect the standard cells with each other and with other customized circuits on the same chip.
To ensure that design rules, which include a set of pre-defined design rules guiding the design, are not violated when the standard cells are placed, the design of standard cells has to follow some design rules initially. For example, active regions (such as source regions and drain regions) have to be spaced apart from the cell boundaries, so that when neighboring cells are abutted, the active regions of neighboring cells will not undesirably adjoin each other.
Such precaution, however, incurs area penalties. The reserved space between the active regions and the respective cell boundaries results in a significant increase in the areas of the standard cells. In addition, since the active regions are spaced apart from the cell boundaries, when the standard cells are placed abutting each other, the active regions will not be joined, even if some of the active regions in neighboring standard cells need to be electrically coupled. These physically disconnected active regions have to resort to metal lines in order to electrically connect to each other. However, even if the active regions are electrically connected by the metal lines, they are still physically discontinuous, and the performance of the resulting device will be worse than if the active regions are continuous.